This invention relates generally to semiconductor electronic devices requiring enhanced security.
Such electronic devices are commonly used to hold data (such as, for example, financial or personal data) which must be kept secure from unauthorised access or xe2x80x9chackingxe2x80x9d.
It has been proposed to incorporate electronic circuitry for specific security features into the active die area of a semiconductor electronic device. However, such a proposal suffers from the disadvantage that the incorporated security circuitry would be visible (under microscopic inspection) to a hacker and would therefore be easier for the hacker to reverse engineer. Also, such incorporated security circuitry could limit the testability of the device during production, and so could compromise product quality or require significant effort to design and implement a new test philosophy.
It has also been known to separate physical features, such as bond/probe pads or test circuitry used for testing during production, from the tested device before the device is shipped from the production facility. Typically the device test mode offers general access to device data and features, and so removing access to the test mode increases the security of device data. However, these known separation methods merely disconnect the features, such as bond/probe pads or test circuitry, from the device and leave visible and active the remaining conductors and circuitry. These known separation methods could, therefore, conceivably allow a hacker who could obtain the separated bond/probe pads or test circuitry to reconnect or reverse engineer the necessary circuitry to gain access to the device""s test mode.
It is an object of the present invention to provide a semiconductor circuit arrangement, a semiconductor device and a method of production thereof, in which the above disadvantages are overcome or at least alleviated.
The above object has been achieved by a semiconductor arrangement having a first circuitry portion, consisting of one or more semiconductor dies, disposed on a semiconductor wafer and a second circuitry portion on the wafer separate from the first circuitry portion. The second circuitry portion is coupled to the first circuitry portion and contains access circuitry for allowing access to the first circuitry portion and contains bond pads for allowing exclusive access to the access circuitry. The second circuitry portion is disposed on the wafer such that it can be destructively removed therefrom to leave the first portion of semiconductor circuitry inaccessibe through the second portion of semiconductor circuitry. Isolation circuitry is provided for electrical isolation of the first circuitry portion following the destructive removal of the second circuitry portion.
In accordance with a first aspect of the invention there is provided a semiconductor circuit arrangement as claimed in claim 1.
In accordance with a second aspect of the invention there is provided a semiconductor device as claimed in claim 5.
In accordance with a third aspect of the invention there is provided a method of producing semiconductor circuitry as claimed in claim 8.